Catena® 1910


HSIC USB Protocol Analyzer and Verification System


See a video demonstration of the Catena 1910

In 2007, the USB standard was extended to provide a high speed (480 megabit/second) chip-to-chip interface. High Speed InterChip USB (HSIC USB) saves power compared to traditional high speed USB 2.0. It uses a simplified two wire (or optionally three wire) interface, operates at low-voltage CMOS levels, and eliminates legacy low speed and full speed USB support, thus replacing the traditional USB analog PHY with an interface suitable for implementation in a digital logic process or FPGA.

Because the HSIC USB PHY is electically and logically incompatible with the traditionally USB PHY, it is not easy to use standard USB hosts to test HSIC USB devices; nor is it easy to use standard USB devices to test HSIC USB hosts. Furthermore, USB analyzers generally only support tracing via standard USB cables and connectors. Because HSIC USB doesn’t use a standard USB connector, special probes are needed to attach to and record the traffic from the bus.

MCCI Catena 1910

mcci catena 1910

To ease development and support of HSIC USB systems, MCCI has developed the Catena 1910 HSIC test system (see product photo left and system diagram below). The Catena 1910 can operate as a host, a device, or as a passive traffic-capture probe. It connects to a Windows PC via an ExpressCard PCIe interface.

When operating in host mode, the Synopsys DesignWare Hi-Speed USB 2.0 On-The-Go IP in FPGA operates as an HSIC USB host, seeing the Unit Under Test (UUT) as an HSIC device, and loading standard Windows drivers to operate the device.

In device mode, the Synopsys DesignWare Hi-Speed USB 2.0 On-The-Go IP in the FPGA operates as an HSIC USB device, using the MCCI USB DataPump to provide suitable device behavior, as programmed by the test engineer. The DataPump code runs on the Windows PC.

In passive capture mode, the Catena 1910 simply monitors traffic on an external HSIC USB bus segment.

In all three modes, integrated hardware captures USB transaction-level traffic. During data acquisition, triggering can be done manually by the operator or automatically, as defined by parameters set in the PC-based control software. Captured data is formatted such that it can be exported for viewing with Ellisys Visual USB or Telesys LeCroy Voyager analyzer software.

The Catena 1910 is especially helpful for device firmware developers, as they can test their HSIC USB device implementations against known-good reference drivers and applications running on a Windows PC host. Similarly, host firmware developers can test their host implementation for specific device behaviors, by writing appropriate code for the MCCI USB DataPump.

Because PCs with compatible ExpressCard PCIe support are hard to find, the Catena 1910 is supplied with a suitable laptop.

HSIC_Tester_Catena1910

Catena 1910 HSIC Tester Features

Here are some of the features offered by the Catena 1910 Tester:

  • USB 2.0 HSIC using Synopsys USB HS OTG IP as host or device
  • Protocol data capture mode
  • External trigger option
  • Trigger on condition
  • Configurable voltages
  • Overvoltage protection
  • 128 MB trace data buffer
  • HSIC AUX ECN support
  • Raw data dump mode
  • Data viewable with Ellisys Visual USB viewer
  • Passive capture adapter (US patent 8,643,405) captures external HSIC traffic with minimum bus disturbance
  • Programmable GPIOs for capturing and controlling system-specific information
  • Customizable support for sideband signals for out-of-band suspend and remote wakeup indications

MCCI Catena 1910 HSIC Architecture

Catena1910_Architecture

To Order

For more information, please write to sales@mcci.com.